Conventional Machine Level Execution Cycle
After the
fetch cycle has been completed, an
instruction to be executed has been loaded into the
control unit and the
program counter updated, and the
execution cycle begins. Now, most computers store
data in the memory but perform
arithmetic on the contents of
registers. Now, due to this, the computer functions that implement your
typical programming language statement (for instance, a=b+c;), must move
data from
memory into
registers, do the
arithmetic, and then move the results back into the
memory.
The actual sequence of instructions required to solve this simple arithmetic statement (a=b+c) varies from computer to computer. We will use one example that requires three
instructions. The first instruction has an
opcode that specifies copying
data from
memory into a
register in an operation called
load. This instruction must indicate the memory location of the data, which we will call b, referring to second variable in our
arithmetic operation.
Now, the next
memory location that must be added to the number in the
register and the result placed back into the
register is specified by the second
instruction. This instruction must also indicate the
address of its data, c. The final instruction indicates that the results are to be copied from the register back into the memory in an operation called
store. As with the other instructions, the address of the desired location, a, must be specified.
The table below shows what these instructions might look like in memory. In the example above, the variable b is located at the 26th decimal position in memory. Or, the address of b is
1A16. The address of c is at 1B
16, and a is at 1C
16. The example assumes that each instruction is two
bytes. The first byte is the
opcode and the second
byte is an
operand. Also, we assume that the instructions have been placed in memory starting at location 100
16. All of this is naturally done in binary.
memory
address | contents
100: | load data
101: | 1A16
102: | add data
103: | 1B16
104: | store data
105: | 1C16
The initial instruction
fetch cycle begins with the program
pointer set to 100
16 and ends with the instruction register holding the load data opcode and the
program counter incremented to 101
16.During decoding of this instruction the control circuitry determines that a register is to be loaded from memory. The load
opcode also specifies that the address of the data is indicated by the
operand.
Before it can be copied into a register, the address of the data must be determined. The program counter, which was updated at the end of the
fetch cycle, contains the address of the
operand. The process of fetching the operand requires that the
control unit do the following:
1. Copy the contents of the
program counter to the
memory address register.
2. Issue a
read request.
3. Capture the
operand in the
memory buffer register.
4. Increment the
program counter.
Remember that the data now in the
MBR (
Memory Buffer Register) is not the number to be placed in the register. It is, rather, the
address of the number. Using this address, the control unit can finally retrieve the
data stored using the following sequence of operations:
5. Send the contents of the
memory buffer register back to the
memory address register.
6. Issue another read request.
7. Capture the data in the
memory buffer register.
8. Tell the register to accept new data.
9. Copy the data into a register.
The first instruction is officially completed once all of these steps are completed. The
control unit returns to
instruction fetch mode. The
program counter indicates that the next instruction is at 102
16. This address is copied to the
memory address register and a read request is initiated. The instruction at 102
16 (add data) is copied to the
memory buffer register and ultimately into the instruction register. The
fetch cycle ends with the
program counter updated to 103
16.
During the execution of the
add instruction, the
control unit must fetch the
operand and use it as an address, access the data, instruct the
ALU to add the new data to the contents of the register, and store the results in the register. Fetch and execution of the add instruction causes the
program counter to be incremented to 103
16 after the instruction fetch and 104
16 after the
operand fetch. The next instruction
fetch cycle loads the store data instruction from location 104
16 and increments the program counter to 105
16.
The first steps of the store instruction are similar to those already examined. The operand is accessed and sent to the
memory address register.
Control then causes the contents of the
accumulator to be moved to the
memory buffer register and then issues a write command to memory. Finally, the contents of the
memory buffer register are stored at the address indicated by the
memory address register. Once the store operation is complete, the
control unit fetches the next instruction. What happens at that point depends on the contents of location 106
16.
In conclusion, consider for a moment the amount of work required to carry out these three simple instructions. What would happen if these instructions were inside a loop being executed 10,000 times? I think it is clear now, just how
all programmers came to be so paranoid.