MOVE processor (thing)

A MOVE processor, or one in which many of the registers are the raw inputs to or outputs from the functional units, wouldn't be that much different from regular RISC. In fact, because most instructions have two inputs, it'd be a bit redundant.

Sample MOVE instruction

fedcba9876543210
||||||||||||||||
|||||||||+++++++- Source register
||+++++++-------- Destination register
|+--------------- 1: Execute
+---------------- 1: Parallel

Refining

A little thought shows that a RISC instruction would require two MOVE instructions to implement, moving each of the two operands from one unit into another. Thus, instructions effectively look like this:

fedcba9876543210 fedcba9876513210
|||||||||||||||| ||||||||||||||||
|||||||||||||||| |||||||||+++++++- Source register B
|||||||||||||||| ||||||||+-------- Always 1 (B operand)
|||||||||||||||| ||++++++--------- Functional unit
|||||||||||||||| |+--------------- Always 1 (execute)
|||||||||||||||| +---------------- Parallel?
|||||||||+++++++------------------ Source register A
||||||||+------------------------- Always 0 (A operand)
||++++++-------------------------- Always same functional unit
|+-------------------------------- Always 0 (don't execute)
+--------------------------------- Always parallel

from which some constants can be factored out, producing a 32-bit instruction that's very RISCish but has always has the destination register the same as the opcode:

fedcba9876543210 fedcba9876513210
|||||||||||||||| ||||||||||||||||
|||||||||||||||| ||||||||++++++++- Source register 1
|||||||||||||||| ++++++++--------- Source register 0
||||||||++++++++------------------ Destination register pair
|||||||+-------------------------- 1: Load constant
|++++++--------------------------- Condition register
+--------------------------------- 1: Parallel

Refactoring frees up bits for the condition register, which lets an instruction be executed conditionally on an output register (typically a comparison unit) being nonzero. Doing this with the program counter's adder gives you a branch instruction.

Caveats

• You won't able to get all your functional units going at once without a really fat pipe to instruction memory. Intel failed to recognize this flaw in early Pentium 4 processors.
• Hard to add new instructions unless space is reserved for new result registers.
• Some instructions (such as multiply, divide, and floating-point) take longer than others. The MOVE processor's exposed pipeline makes it hard to change relative instruction timings.